1. Field of the Invention
The present invention relates to an integrated circuit comprising an insulating substrate on which insulated-gate semiconductor devices (TFTs) in the form of thin films are formed and also to a method of fabricating the integrated circuit. The insulated substrate referred to herein means a whole object having a dielectric surface and embraces semiconductors, metals, and other materials on which an insulator layer is formed, unless stated otherwise. Semiconductor integrated circuits according to the invention can be used in various circuits and devices, such as active matrix circuits of liquid crystal displays, their peripheral driver circuits, driver circuits for driving image sensors or the like, SOI integrated circuits, and conventional semiconductor integrated circuits (e.g., microprocessors, microcontrollers, microcomputers, and semiconductor memories, and so forth).
2. Description of the Related Art
Where an active matrix liquid crystal display, an image sensor circuit, or other circuit is formed on a glass substrate, use of integrated thin-film transistors (TFTs) has enjoyed wide acceptance. In this case, it is customary to first form a first wiring including a gate electrode. Then, an interlayer insulator layer is formed. Subsequently, a second wiring is formed. If necessary, a third and even a fourth wirings may be formed.
A serious problem with such a TFT integrated circuit is that the second wiring breaks at the intersections of this second wiring and a gate wiring which is an extension of a gate electrode. This is caused by the fact that it is difficult to form an interlayer insulator layer over a gate electrode and wiring with a good step coverage and to flatten the insulator layer.
FIG. 4 illustrates wiring breakage often occurring in the prior art TFT integrated circuit. A TFT region 401 and a gate wiring 402 are formed over a substrate. An interlayer insulator 403 is formed on these region and wiring. If the edges of the gate wiring 402 are sharp, the interlayer insulator 403 cannot fully cover the gate wiring. Under this condition, if the second wiring, 404 and 405, is formed, it is likely that the second layer breaks, as shown, at portions 406.
In order to prevent such wiring breakage, it is necessary to increase the thickness of the second wiring. For example, it has been desired to increase the thickness of the gate wiring about twofold. However, this means that the unevenness on the integrated circuit is increased further. If a further wiring is required to be deposited, breakage due to the thickness of the second wiring must be taken into consideration. Where an integrated circuit whose unevenness should be suppressed as in a liquid crystal display, it is substantially impossible to address the problem by increasing the thickness of the second wiring.
In an integrated circuit, if a wiring breakage occurs even at one edge of a step, then the whole circuit is made useless. Therefore, it is important to reduce wiring breakages at steps.